Computer Arithmetic : Algorithms and Hardware Designs. Ideal for graduate and senior undergraduate level courses in computer arithmetic and advanced digital design, Computer Arithmetic: Algorithms and Hardware Designs provides a balanced, comprehensive treatment of computer arithmetic, covering topics in arithmetic unit design and circuit implementation that complement the architectural and algorithmic speedup techniques used in high-performance computer architecture and parallel processing. Using a unified and consistent framework, the text begins with number representation and proceeds through basic arithmetic operations, floating-point arithmetic, and function evaluation methods. Later chapters cover broad design and implementation topics--including techniques for high-throughput, low-power, and fault-tolerant arithmetic--and also feature brief case studies. An indispensable resource for instruction, professional development, and research in digital computer arithmetic, Computer Arithmetic: Algorithms and Hardware Designs combines broad coverage of the underlying theories of computer arithmetic with numerous examples of practical designs, worked-out examples, and a large collection of meaningful problems. Features: DT Divided into 28 lecture-size chapters DT Emphasizes both the underlying theories of computer arithmetic and actual hardware designs DT Carefully links computer arithmetic to other subfields of computer engineering DT Includes over end-of-chapter problems ranging in complexity from simple exercises to mini-projects DT Incorporates many examples of practical designs DT Uses consistent standardized notation throughout DT Instructor's manual includes solutions to text problems, additional exercises, test questions, and enlarged versions of figures and charts.

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Page last updated on May 01 B. Instructor's solutions manual is provided gratis by Oxford Univ. Press to instructors who adopt the textbook. For lecture slides and other teaching aids, see below. The date of the last update is provided. Despite continued advances in arithmetic algorithms and implementation technologies over the past ten years, the book's top-level design remains sound. The new chapter replaces the previous Chapter 28, whose original contents now appear in an appendix.

The author contemplated adding a second appendix listing websites and other Internet resources for further study. This approach is attractive for prototyping new designs, for producing one-of-a-kind or low-volume systems, and for use in rapidly evolving products that need to be upgradeable in the field. It is useful to describe designs and design strategies that have been found appropriate in such a context. The new material blends in nicely with the other three chapters in Part VII, all dealing with implementation topics.

Examples covered in the new Chapter 28 include table-based function evaluation, along with several designs for adders and multipliers. Augmentations, improvements, clarifications, and corrections appear throughout this second edition. Material has been added to many subsections to reflect new ideas and developments.

In a number of cases, old subsections have been merged and new subsections created for additional ideas or designs. New and expanded topics that are given section-length treatments in this second edition include the following section numbers appear in parentheses : Modular two-operand and multioperand adders 7.

Rather than include new general reference sources in this preface, the author has taken the liberty of updating and expanding the list of references at the end of the Preface to the First Edition, so as to provide a single comprehensive list.

As always, the author welcomes correspondence on discovered errors, subjects that need further clarification, problem solutions, and ideas for new topics or exercises. Note: Fig. The context of computer arithmetic Advances in computer architecture over the past two decades have allowed the performance of digital computer hardware to continue its exponential growth, despite increasing technological difficulty in speed improvement at the circuit level.

This phenomenal rate of growth, which is expected to continue in the near future, would not have been possible without theoretical insights, experimental research, and toolbuilding efforts that have helped transform computer architecture from an art into one of the most quantitative branches of computer science and engineering.

Better understanding of the various forms of concurrency and the development of a reasonably efficient and user-friendly programming model have been key enablers of this success story.

The downside of exponentially rising processor performance is an unprecedented increase in hardware and software complexity. The trend toward greater complexity is not only at odds with testability and certifiability but also hampers adaptability, performance tuning, and evaluation of the various trade-offs, all of which contribute to soaring development costs.

A key challenge facing current and future computer designers is to reverse this trend by removing layer after layer of complexity, opting instead for clean, robust, and easily certifiable designs, while continuing to try to devise novel methods for gaining performance and ease-of-use benefits from simpler circuits that can be readily adapted to application requirements. In the computer designers' quest for user-friendliness, compactness, simplicity, high performance, low cost, and low power, computer arithmetic plays a key role.

It is one of oldest subfields of computer architecture. Thus, first-generation computer designers were motivated to simplify and share hardware to the extent possible and to carry out detailed cost-performance analyses before proposing a design. Many of the ingenious design methods that we use today have their roots in the bulky, power-hungry machines of years ago. In fact computer arithmetic has been so successful that it has, at times, become transparent. Arithmetic circuits are no longer dominant in terms of complexity; registers, memory and memory management, instruction issue logic, and pipeline control have become the dominant consumers of chip area in today's processors.

Correctness and high performance of arithmetic circuits are routinely expected, and episodes such as the Intel Pentium division bug of the mid s are indeed rare.

The preceding context is changing for several reasons. First, at very high clock rates, the interfaces between arithmetic circuits and the rest of the processor become critical.

Arithmetic units can no longer be designed and verified in isolation. Rather, an integrated design optimization is required, which makes the development even more complex and costly. Second, optimizing arithmetic circuits to meet design goals by taking advantage of the strengths of new technologies, and making them tolerant to the weaknesses, requires a reexamination of existing design paradigms. Finally, incorporation of higher-level arithmetic primitives into hardware makes the design, optimization, and verification efforts highly complex and interrelated.

This is why computer arithmetic is alive and well today. Designers and researchers in this area produce novel structures with amazing regularity. Carry-lookahead adders comprise a case in point. We used to think, in the not so distant past, that we knew all there was to know about carry-lookahead fast adders. Yet, new designs, improvements, and optimizations are still appearing. The IEEE standard floating-point format has removed many of the concerns with compatibility and error control in floating-point computations, thus resulting in new designs and products with mass-market appeal.

Given the arithmetic-intensive nature of many novel application areas such as encryption, error checking, and multimedia , computer arithmetic will continue to thrive for years to come. The goals and structure of this book The field of computer arithmetic has matured to the point that a dozen or so texts and reference books have been published.

Each of these books has its unique strengths and has contributed to the formation and fruition of the field. The current text, Computer Arithmetic: Algorithms and Hardware Designs , is an outgrowth of lecture notes the author developed and refined over many years. Here are the most important features of this text in comparison to the listed books: Division of material into lecture-size chapters.

In my approach to teaching, a lecture is a more or less self-contained module with links to past lectures and pointers to what will transpire in future. Each lecture must have a theme or title and must proceed from motivation, to details, to conclusion.

In designing the text, I strived to divide the material into chapters, each of which is suitable for one lecture hours. A short lecture can cover the first few subsections, while a longer lecture can deal with variations, peripheral ideas, or more advanced material near the end of the chapter.

To make the structure hierarchical, as opposed to flat or linear, lectures are grouped into seven parts, each composed of four lectures and covering one aspect of the field Fig.

Emphasis on both the underlying theory and actual hardware designs. The ability to cope with complexity requires both a deep knowledge of the theoretical underpinnings of computer arithmetic and examples of designs that help us understand the theory.

Such designs also provide building blocks for synthesis as well as reference points for cost-performance comparisons. This viewpoint is reflected in, for example, the detailed coverage of redundant number representations and associated arithmetic algorithms Chapter 3 that later lead to a better understanding of various multiplier designs and on-line arithmetic. Another example can be found in Chapter 22, where coordinate rotation digital computer, or CORDIC, algorithms are introduced from the more intuitive geometric viewpoint.

Linking computer arithmetic to other subfields of computing. Computer arithmetic is nourished by, and in turn nourishes, other subfields of computer architecture and technology. Examples of such links abound.

The design of carry-lookahead adders became much more systematic once it was realized that the carry computation is a special case of parallel prefix computation that had been extensively studied by researchers in parallel computing.

Arithmetic for and by neural networks is an area that is still being explored. The residue number system has provided an invaluable tool for researchers interested in complexity theory and the limits of fast arithmetic, as well as to the designers of fault-tolerant digital systems. Wide coverage of important topics. The text covers virtually all important algorithmic and hardware design topics in computer arithmetic, thus providing a balanced and complete view of the field. Every effort is made to use consistent notation and terminology throughout the text.

For example, r always stands for the number representation radix and s for the remainder in division or square-rooting. While other authors have done this in the basic parts of their texts, many tend to cover more advanced research topics by simply borrowing the notation and terminology from the reference source. Such an approach has the advantage of making the transition between reading the text and the original reference source easier, but it is utterly confusing to the majority of the students, who rely on the text and do not consult the original references except, perhaps, to write a research paper.

Summary of topics The seven parts of this book, each composed of four chapters, were written with the following goals. Part I sets the stage, gives a taste of what is to come, and provides a detailed perspective on the various ways of representing fixed-point numbers. Included are detailed discussions of signed numbers, redundant representations, and residue number systems.

Part II covers addition and subtraction, which form the most basic arithmetic building blocks and are often used in implementing other arithmetic operations. Included in the discussions are addition of a constant counting , various methods for designing fast adders, and multioperand addition. The special case of squaring is also discussed. Part V PartVdeals with real number arithmetic, including various methods for representing real numbers, floating-point arithmetic, errors in representation and computation, and methods for high-precision and certifiable arithmetic.

Part VI covers function evaluation, beginning with the important special case of square-rooting and moving on to coordinate rotation digital computer, or CORDIC, algorithms, followed by general convergence and approximation methods, including the use of lookup tables.

Part VII deals with broad design and implementation topics, including pipelining, low-power arithmetic, and fault tolerance. This part concludes by providing historical perspective and examples of arithmetic units in real computers. Pointers on how to use the book For classroom use, the topics in each chapter of this text can be covered in a lecture lasting hours.

In his own teaching, the author has used the chapters primarily for 1. But the modular structure of the text lends itself to other lecture formats, self-study, or review of the field by practitioners. In the latter two cases, readers can view each chapter as a study unit for one week, say rather than as a lecture.

Ideally, all topics in each chapter should be covered before the reader moves to the next chapter. However, if fewer lecture hours are available, some of the subsections located at the end of chapters can be omitted or introduced only in terms of motivations and key results.

Problems of varying complexities, from straightforward numerical examples or exercises to more demanding studies or miniprojects, are supplied for each chapter.

These problems form an integral part of the book: they were not added as afterthoughts to make the book more attractive for use as a text. A total of problems are included per chapter. Assuming that two lectures are given per week, either weekly or biweekly homework can be assigned, with each assignment having the specific coverage of the respective half-part two chapters or full-part four chapters as its "title.

References to classical papers in computer arithmetic, key design ideas, and important state-of-the-art research contributions are listed at the end of each chapter. These references provide good starting points for in-depth studies or for term papers or projects.

A large number of classical papers and important contributions in computer arithmetic have been reprinted in two volumes [Swar90]. New ideas in the field of computer arithmetic appear in papers presented at biannual conferences, known as ARITH- n , held in odd-numbered years [Arit].

Acknowledgments Computer Arithmetic: Algorithms and Hardware Designs is an outgrowth of lecture notes the author used for the graduate course "ECE B: Computer Arithmetic" at the University of California, Santa Barbara, and, in rudimentary forms, at several other institutions prior to The text has benefited greatly from keen observations, curiosity, and encouragement of my many students in these courses.

A sincere thanks to all of them! General references Note: References appear in updated 2nd-edition form, in order to avoid the need for a separate list for the latter.

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## Computer Arithmetic: Algorithms and Hardware Designs

A text that integrates new material with an already strong organization--featuring more than practice problems. Ideal for graduate and senior undergraduate courses in computer arithmetic and advanced digital design, Computer Arithmetic: Algorithms and Hardware Designs , Second Edition, provides a balanced, comprehensive treatment of computer arithmetic. It covers topics in arithmetic unit design and circuit implementation that complement the architectural and algorithmic speedup techniques used in high-performance computer architecture and parallel processing. Using a unified and consistent framework, the text begins with number representation and proceeds through basic arithmetic operations, floating-point arithmetic, and function evaluation methods. Later chapters cover broad design and implementation topics-including techniques for high-throughput, low-power, fault-tolerant, and reconfigurable arithmetic.

ISO 5725-6 PDF

## Computer Arithmetic

Page last updated on May 01 B. Instructor's solutions manual is provided gratis by Oxford Univ. Press to instructors who adopt the textbook. For lecture slides and other teaching aids, see below. The date of the last update is provided. Despite continued advances in arithmetic algorithms and implementation technologies over the past ten years, the book's top-level design remains sound. The new chapter replaces the previous Chapter 28, whose original contents now appear in an appendix.